Circuit device and manufacturing method of circuit device

ABSTRACT

After a trench  54  is formed in a conductive foil  60,  the circuit elements are mounted, and the insulating resin is applied on the conductive foil  60  as the support substrate. After being inverted, the conductive foil  60  is polished on the insulating resin  50  as the support substrate for separation into the conductive paths. Accordingly, it is possible to fabricate the circuit device in which the conductive paths  51  and the circuit elements  52  are supported by the insulating resin  50,  without the use of the support substrate. And the interconnects L 1  to L 3  requisite for the circuit are formed, and can be prevented from slipping because of the curved structure  59  and a visor  58.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a circuit device and a method formanufacturing the circuit device, and more particularly to a thin-typecircuit device and a method of manufacturing the thin-type circuitdevice without the need of providing a support substrate.

2. Description of the Related Art

Conventionally, it has been demanded that a circuit device which is setin an electronic apparatus is reduced in size, thickness and weight,because the circuit device is used for a portable telephone, a portablecomputer and so on.

For example, a semiconductor device as a circuit device is typically apackage type semiconductor device which is conventionally sealed bynormal transfer molding. This semiconductor device 1 is mounted on aprinted circuit board PS as shown in FIG. 24.

This package type semiconductor device 1 has a semiconductor chip 2covered with a resin layer 3, with a lead terminal 4 for externalconnection derived from the side of this resin layer 3.

However, this package type semiconductor device 1 had the lead terminal4 out of the resin layer 3, and was too large in total size to meetsmaller, thinner and lighter requirements.

Therefore, various companies have competed to develop a wide variety ofstructures which are reduced in size, thickness and weight. Recently, awafer scale CSP which is as large as a chip size, called a CSP-(ChipSize Package), or a CSP which is slightly larger than the chip size, hasbeen developed.

FIG. 25 shows a CSP 6 which adopts a glass epoxy substrate 5 as asupport substrate and which is slightly larger than a chip size. Herein,a transistor chip T is mounted on the glass epoxy substrate 5.

On the surface of this glass epoxy substrate 5, a first electrode 7, asecond electrode 8 and a die pad 9 are formed, and on the back face, afirst back electrode 10 and a second back electrode 11 are formed. Via athrough hole TH, the first electrode 7 and the first back electrode 10,as well as the second electrode 8 and the second back electrode 11, areelectrically connected. On the die pad 9, the bare transistor chip T isfixed. An emitter electrode of transistor and the first electrode 7 areconnected via a bonding wire 12, and a base electrode of transistor andthe second electrode 8 are connected via the bonding wire 12. Further, aresin layer 13 is provided on the glass epoxy substrate 5 to cover thetransistor chip T.

The CSP 6 adopts the glass epoxy substrate 5, which has the merits of asimpler structure extending from the chip T to the back electrodes 10,11 for external connection, and a less expensive cost of manufacture,than the wafer scale CSP.

The CSP 6 is mounted on the printed circuit board PS, as shown in FIG.24. The printed circuit board PS is provided with the electrodes andwires making up an electric circuit, and has the CSP 6, the package typesemiconductor device 1, a chip resistor CR and a chip capacitor CC fixedfor the electrical connection.

A circuit on this printed circuit-board is packaged in various sets.

Referring to FIGS. 26 and 27, a method for manufacturing this CSP willbe described below. In FIG. 27, reference is made to a flow diagramentitled as a Glass epoxy/flexible substrate, listed in the middle.

Firstly, the glass epoxy substrate 5 is prepared as a base material(support substrate). On both sides of the glass epoxy substrate 5, theCu foils 20, 21 are applied via an insulating adhesive (see FIG. 26A).

Subsequently, the Cu foils 20, 21 corresponding to the first electrode7, the second electrode 8, the die pad 9, the first back electrode 10and the second back electrode 11 are coated with an etching resist 22and patterned. Note that the patterning may be made separately on thefront face and the back face (see FIG. 26B).

Then, using a drill or a laser, a bore for the through hole TH is openedin the glass epoxy substrate. This bore is plated to form the throughhole TH. Via this through hole TH, the electrical connection between thefirst electrode 7 and the first back electrode 10 and between the secondelectrode 8 and the second back electrode 10 is made (see FIG. 26C).

Further, though being not shown in the figure, the first electrode 7 andthe second electrode 8 which become the bonding posts are subjected toNi plating or Au plating, and the die pad 9 which becomes a die bondingpost is subjected to Au plating to effect die bonding of the transistorchip T.

Lastly, the emitter electrode of the transistor chip T and the firstelectrode 7, and the base electrode of the transistor chip T and thesecond electrode 8 are connected via the bonding wire 12, and coveredwith the, resin layer 13 (see FIG. 26D).

As required, individual electrical elements are formed by dicing. InFIG. 26, only one transistor chip T is provided on the glass epoxysubstrate 5, but in practice, a matrix of transistor chips T areprovided. Accordingly, a dicing apparatus separates them into individualelements.

In accordance with the above manufacturing method, a CSP type electricalelement using the support substrate 5 can be completed. Thismanufacturing method is also effected with the use of a flexible sheetas the support substrate.

On the other hand, a manufacturing method adopting a ceramic substrateis shown in a flow diagram to the left in FIG. 27. After the ceramicsubstrate which is the support substrate is prepared, the through holesare formed. Then using a conductive paste, the electrodes are printedand sintered on the front face and the back face. Thereafter, the samemanufacturing method of FIG. 26, up to coating the resin layer isfollowed, but since the ceramic substrate is very fragile, and is likelyto break off, unlike a flexible sheet or the glass epoxy substrate,there is a problem with the difficulty of molding using die. Therefore,a sealing resin is potted and cured, then polished for the uniformtreatment of the face of the sealing resin. Lastly, using the dicingapparatus, individual devices are made.

In FIG. 25, the transistor chip T, connecting means 7 to 12, and theresin layer 13 are requisite components for the electrical connectionwith the outside, and the protection of transistor. However, only thesecomponents were difficult to provide an electrical circuit devicereduced in size, thickness and weight.

Essentially, there is no need of having the glass epoxy substrate 5which becomes the support substrate, as described before. However, sincethe manufacturing method involves pasting the electrode on thesubstrate, the support substrate is required, and this glass epoxysubstrate 5 could not be dispensed with.

Accordingly, the use of this glass epoxy substrate 5 raised the cost.Further, since the glass epoxy substrate 5 was thick, the circuit devicewas thick, limiting the possibility to reduce the size, thickness andweight of the device.

Further, the glass epoxy substrate or the ceramic substrate necessarilyrequires a through hole forming process for connecting the electrodes onboth sides. Hence, there was a problem with the long manufacturingprocess.

FIG. 28 shows a pattern diagram on the glass epoxy substrate, theceramic substrate or a metal substrate. On this pattern, an IC circuitis typically made, with a transistor chip 21, an IC chip 22, a chipcapacitor 23 and/or a chip resistor 24 mounted. Around this transistorchip 21 or the IC chip 22, a bonding pad 26 integral with a wire 25 isformed to electrically connect the chips 21, 22 via a bonding wire 28. Awire 29 is made integrally with an external lead pad 30. These wires 25,29 are bent through the substrate, and made slender in the IC circuit,as necessary. Accordingly, this slender wire has smaller contact areawith the substrate, leading to exfoliation or curvature of the wire. Thebonding pad 26 is classified into a bonding pad for power and a bondingpad for small signal. Particularly, the bonding pad for small signal hasa small bonding area, which caused a film exfoliation.

Further, an external lead is fixed to an external lead pad 30. There wasa problem that the external lead pad 30 might be exfoliated due to anexternal force applied to the external lead.

SUMMARY OF THE INVENTION

The present invention intends to obtain a semiconductor device which iseasy to be manufactured, and has a high accuracy and reliability.

The present invention has been achieved in the light of theabove-mentioned problems, and its object is to provide a circuit device,comprising:

a plurality of conductive paths;

a circuit element mounted on said desired conductive paths; and

a package of an insulating resin for coating said circuit element andsupporting integrally said conductive paths;

a plurality of lead terminals for connecting with outer circuit, thelead terminals being exposed from one surface of the package

Preferably, the conductive paths are made of pressed metal.

In the present invention, since a plate like body is used as aconductive plate for forming conductive path pattern and an isolationtrench is formed by half punching or half etching to form conductivepaths, conductive paths whose sheet resistance is very low, whosepattern is fine and whose surface is very flat, can be obtained.

Therefore, bonding reliability is very high and in the case of mountinga high-integrated semiconductor circuit, high accuracy and reliabilityin the high-integrated semiconductor circuit device can be realized.

According to using a pressed metal as a conductive plate, boundaries arepositioned at random, thereby sheet resistance is low and fine and veryflat conductive paths in microscopic views can be obtained.

In the case that plating film whose thickness is formed so thick as tobe able to use as conductive paths, film thickness is deviated and asufficient flatness cannot be obtained. For example, when a plating filmwhose thickness is 20-100 μm is formed, it is difficult to have anuniform thickness of the plating film. Therefore bonding strength islowered.

Contrary that, in the case if conductive paths formed by half etching apressed metal such as copper foil, the surface of the conductive pathsis very flat and bonding accuracy and bonding reliability are very high.

In the plating film, according to using a mirror polished surface of asubstrate as a growth starting face of plating, then removing thesubstrate and using the growth starting face as a bonding face, flatnessof the bonding surface is slightly improved. However accuracy in thecase is inferior to use the pressed metal such as cooper.

Further according to the above structure, the present invention hasfollowing advantages. The semiconductor device of the present inventioncan be enduring a stress caused by a warp of a thin type package.Further an electrical connecting portion can be prevented from beingpolluted. Since rigidity is improved, operation efficiency can beimproved.

For example, by using a pressed metal including a Fe—Ni alloy as a maincomponent, as the conductive path, thermal expansion coefficient can beprevented from mismatching, since thermal expansion coefficient of thesilicon chip is near to that of the Fe—Ni alloy.

Further, by using a pressed metal including Al as a main component, thedevice becomes lighter than that using a pressed metal including Cu orFe—Ni as a main component. In this case, without forming a plating film,direct bonding can be conducted with using an Al wiring or Au wiring.

Since the conductive path is made of a material whose crystal boundaryis disposed at random so that a surface of the conductive path is flat,endurance against bending or rigidity can be improved and adeterioration of the conductive path.

Further a surface on which circuit element is to be formed is coveredwith a conductive film made of metal material different from a materialof the conductive path. Therefore warp or wire breaks of the conductivepath caused by a stress, and reliability of connecting portion between adie-bonding portion and an element. Further according to using theconductive film made of Ni plating film, wire bonding using Al wire canbe conducted and formation of a visor (projected portion) can be formedFurther, for example, the present invention has been achieved in thelight of the above-mentioned problems, and its object is to provide acircuit device, comprising:

a plurality of conductive paths which are electrically isolated;

a plurality of circuit elements fixed on said desired conductive paths;and

an insulating resin for coating said circuit elements and supportingintegrally said conductive paths;

wherein at least one of the plurality of said conductive paths is usedfor an interconnect to electrically connect the plurality of saidcircuit elements, and has a curved lateral face(side surface) to befitted with said insulating resin. The present invention can resolve theabove conventional problems with the minimum number of components, theconductive path being prevented from slipping off the insulating resin.

According to a second aspect of the invention, there is provided acircuit device, comprising:

a plurality of conductive paths which are electrically isolated by atrench;

a plurality of circuit elements fixed on said desired conductive paths;and

an insulating resin for coating said circuit elements and supportingintegrally said conductive paths by being filled into said trenchbetween said conductive paths;

wherein at least one of the plurality of said conductive paths is usedfor an interconnect to electrically connect the plurality of saidcircuit elements, and has a curved lateral face to be fitted with saidinsulating resin. The present invention can resolve the aboveconventional problems in such a way that the insulating resin filledinto the trench supports the conductive path integrally to preventslippage of the conductive path.

According to a third aspect of the invention, there is provided acircuit device, comprising:

a plurality of conductive paths which are electrically isolated by atrench;

a plurality of circuit elements fixed on said desired conductive paths;and

an insulating resin for coating said circuit elements and supportingintegrally said conductive paths by being filled into said trenchbetween said conductive paths, with the back face of said conductivepaths exposed;

wherein at least one of the plurality of said conductive paths is usedfor an interconnect to electrically connect the plurality of saidcircuit elements, and has a curved lateral face to be fitted with saidinsulating resin. The present invention can resolve the aboveconventional problems in such a way that the back face of conductivepath is utilized as an electrode for external connection, to preventslippage of the conductive path, while the through hole can be alsodispensed with.

According to a fourth aspect of the invention, there is provided amanufacturing method for a circuit device comprising the steps of:

forming the conductive paths having a curved lateral face by preparing aconductive foil, and forming a trench having a smaller depth than thethickness of said conductive foil on said conductive foil excluding atleast a region which becomes a conductive path;

fixing a plurality of circuit elements on said desired conductive paths;

coating and molding said circuit elements with an insulating resin to befilled into said trench for fitting said conductive paths with saidinsulating resin; and

forming a circuit by removing said conductive foil at a portion ofthickness where said trench is not provided, to enable an interconnectformed of a part of said conductive path to be electrically connectedwith said plurality of circuit elements. The present invention canresolve the above conventional problems in such a way that theconductive foil for forming the conductive paths is a starting material,and the conductive foil has a supporting function till the insulatingresin is molded, and the insulating resin has the supporting functionafter molding. There is no need of providing the support substrate.

According to a fifth aspect of the invention, there is provided amanufacturing method for a circuit device comprising the steps of:

forming the conductive paths having a curved lateral face by preparing aconductive foil, and forming a trench having a smaller depth than thethickness of said conductive foil on said conductive foil excluding atleast a region which becomes a conductive path;

fixing a plurality of circuit elements on said desired conductive paths;

providing connecting means for electrically connecting an electrode ofsaid circuit element with desired one of said conductive paths;

coating and molding said circuit elements with an insulating resin to befilled into said trench for fitting said conductive paths with saidinsulating resin;

forming a circuit by removing uniformly said conductive foil at aportion of thickness where said trench is not provided from the backside and making the back face of said conductive paths and saidinsulating resin across said trench a substantially flat surface, toenable an interconnect formed of a part of said conductive path to beelectrically connected with said plurality of circuit elements. Thepresent invention can resolve the above conventional problems in such away as to have bonding which is prevented from slipping and form a flatcircuit device.

BRIEF DESCRIPTION OF THE DRAWINGS

[FIG. 1]

FIG. 1 is a view for explaining a circuit device according to thepresent invention.

[FIG. 2]

FIG. 2 is a view for explaining the circuit device of the invention.

[FIG. 3]

FIG. 3 is a view for explaining a method for manufacturing the circuitdevice of the invention.

[FIG. 4]

FIG. 4 is a view for explaining the method for manufacturing the circuitdevice of the invention.

[FIG. 5]

FIG. 5 is a view for explaining the method for manufacturing the circuitdevice of the invention.

[FIG. 6]

FIG. 6 is a view for explaining the method for manufacturing the circuitdevice of the invention.

[FIG. 7]

FIG. 7 is a view for explaining the method for manufacturing the circuitdevice of the invention.

[FIG. 8]

FIG. 8 is a view for explaining the circuit device of the invention.

[FIG. 9]

FIG. 9 is a view for explaining the method for manufacturing the circuitdevice of the invention.

[FIG. 10]

FIG. 10 is a view for explaining the method for manufacturing thecircuit device of the invention.

[FIG. 11]

FIG. 11 is a view for explaining the method for manufacturing thecircuit device of the invention.

[FIG. 12]

FIG. 12 is a view for explaining the method for manufacturing thecircuit device of the invention.

[FIG. 13]

FIG. 13 is a view for explaining the method for manufacturing thecircuit device of the invention.

[FIG. 14]

FIG. 14 is a view for explaining the method for manufacturing thecircuit device of the invention.

[FIG. 15]

FIG. 15 is a view for explaining the method for manufacturing thecircuit device of the invention.

[FIG. 16]

FIG. 16 is a view for explaining the method for manufacturing thecircuit device of the invention.

[FIG. 17]

FIG. 17 is a view for explaining the method for manufacturing thecircuit device of the invention.

[FIG. 18]

FIG. 18 is a view for explaining the method for manufacturing thecircuit device of the invention.

[FIG. 19]

FIG. 19 is a view for explaining the method for manufacturing thecircuit device of the invention.

[FIG. 20]

FIG. 20 is a view for explaining the method for manufacturing thecircuit device of the invention.

[FIG. 21]

FIG. 21 is a view for explaining a circuit device of the invention.

[FIG. 22]

FIG. 22 is a view for explaining a circuit device of the invention.

[FIG. 23]

FIG. 23 is a view for explaining a way of mounting the circuit device ofthe invention.

[FIG. 24]

FIG. 24 is a view for explaining a mounting structure of theconventional circuit device.

[FIG. 25]

FIG. 25 is a view for explaining the conventional circuit device.

[FIG. 26]

FIG. 26 is a view for explaining a method for manufacturing theconventional circuit device.

[FIG. 27]

FIG. 27 is a view for explaining the method for manufacturing theconventional circuit device and the circuit device of the presentinvention.

[FIG. 28]

FIG. 28 is a pattern diagram of an IC circuit which is applicable to theconventional circuit device and the circuit device of the invention.

[FIG. 29]

FIG. 29 is a diagram for explaining the relation between thesemiconductor manufacturer and the set maker.

DESCRIPTION OF THE PREFERRED EMBODIMENTS

First Embodiment for Circuit Device

Referring to FIG. 1, a circuit device of the present invention will befirst described below in connection with its structure.

FIG. 1 shows a circuit device 53 in which a conductive path 51 is buriedinto an insulating resin 50, and a circuit device 52 is fixed on saidconductive path 51 supported by the insulating resin 50. The lateralface of the conductive path 51 has a curved structure 59.

This circuit device is mainly composed of the circuit elements 52A, 52B,a plurality of conductive paths 51A, 51B and 51C, and the insulatingresin 50 into which the conductive paths 51A, 51B and 51C are buried.Between the conductive paths 51, a trench 54 is filled with theinsulating resin 50. And the insulating resin 50 supports the conductivepaths 51 of the curved structure 59.

The insulating resin may be a thermosetting resin, such as epoxy resin,or a thermoplastic resin, such as polyimide resin and polyphenylenesulfide. Also, the insulating resin may be any of the resins as far asthey can be set by the use of a molding die, or coated by dipping orapplication(coating). Further resin including fiber called as Pre-pregis also applicable. The conductive path 51 may be a conductive foilcomposed of Cu as the main substance, a conductive foil composed of Alas the main constituent, or a conductive foil composed of an alloy ofFe—Ni. Other electrically conductive materials may be of course usable.A conductive material which can be etched or evaporate by laser ispreferable.

In the present invention, the dry etching or wet etching is used for thenon-anisotropic (isotropic) etching to have the lateral face of theconductive path 51 curved, bringing about the anchor effect.

Therefore, the conductive path 51 is prevented from slipping off theinsulating resin 50.

Connecting means for the circuit elements 52 may be a bonding wire 55A,a conductive ball made of brazing material, an oblate conductive ball, abrazing material 55B such as solder, a conductive paste 55C such as Agpaste, a conductive coat, or an anisotropic conductive resin. Theseconnecting means may be selected depending on the kind of the circuitelement 52, and the mounting mode of the circuit element 52. Forexample, for the bare semiconductor element, a bonding wire is selectedto connect the electrode on the surface of the electrode and theconductive path 51. For the CSP, a solder ball or solder bump isselected. For the chip resistor or chip capacitor, the solder 55B isselected. The circuit element packaged, for example, a BGA, can bemounted in the conductive path 51 without causing any problem, in whichthe connecting means may be solder.

To fix the circuit element 52A with the conductive path 51A, aninsulating adhesive is selected if the electrical connection isunnecessary. If the electrical connection is required, the conductivecoat is adopted. Herein, at least one layer of conductive coat may berequired.

The conductive coat materials may be Ag, Au, Pt or Pd, which is coatedby evaporation, sputtering or CVD under low vacuum or high vacuum,plating, or sintering.

For example, Ag is adherent to Au, as well as the brazing material.Hence, if an Au coat is applied on the back face of the chip, the chipcan be directly subjected to thermocompression bonding with an Ag coat,Au coat or solder coat on the conductive path 51A, or the chip can befixed via the brazing material such as solder. Herein, such conductivecoat may be formed on the uppermost layer of the conductive coatslaminated. For example, on the conductive path 51A of Cu, two layers ofNi coat and Au coat may be applied in due order, three layers of Nicoat, Cu coat and solder coat applied in due order, or two layers of Agcoat and Ni coat applied in due order. Note that a number of other kindsof conductive coat or lamination structures are considered, but omittedhere.

This circuit device has the insulating resin 50 which is a sealing resinto support the conductive paths 51. Therefore, the circuit device has noneed of the support substrate, and is constituted of the conductivepaths 51, the circuit elements 52 and the insulating resin 50. Thisconstitution is a feature of the present invention. As describedpreviously in the paragraph of Related Art, the conductive paths of theconventional circuit device are supported by the support substrate, orthe lead frame, which is not required in the intrinsic constitution.However, this circuit device is composed of as many constitutionalelements as needed, without the need of the support substrate. As aresult, this circuit device becomes a thin structure with theinexpensive cost.

In addition to the constitution as described previously, this circuitdevice has the insulating resin 50 for covering the conductive path 51and filled into the trench 54 between the conductive paths 51 to supportthem integrally.

The interval between these conductive paths 51 with the curved structure59 is the trench 54 where the insulating resin 50 is filled, and has themerit of effecting insulation between the conductive paths 51, whilepreventing the conductive paths 51 from slipping from the insulatingresin 50.

This circuit device has the insulating, resin 50 for covering thecircuit elements 52 to be filled into the trench 54 between theconductive paths 51, and supporting the conductive paths integrally withthe back face of the conductive paths 51 exposed.

A point of exposing the back face of the conductive paths ischaracteristic of the present invention. The back face of the conductivepaths can be connected with the external. Hence, there is a feature thatthe conventional through hole TH of FIG. 25 can be dispensed with.

In the case where the circuit elements are directly fixed via theconductive coat made of brazing material, Au, or Ag, the heat developedby the conductive element 52A can be transferred to the mountingsubstrate via the conductive path 51A because the back face of theconductive paths 51 is exposed. Particularly by heat release, thiscircuit device is effective for the semiconductor, chips which canimprove the characteristics such as increased drive current.

This circuit device has a substantially common surface for the trench 54and the conductive paths 51. This structure of common surface is afeature of the present invention in that the circuit device 53 can bemoved horizontally because there is no step between the back electrodes10, 11 as shown in FIG. 25.

In FIG. 1, a plurality of circuit elements constitute an IC circuit, andthe conductive paths for connection between the circuit elements arewired, with a land configuration as shown in FIG. 1B. However, thepractical configuration is more complex as shown in FIGS. 2 and 28.

Further as an another arrangement of the first embodiment, as shown inFIG. 1C, the interval between these conductive paths 51 with a straightstructure 59S can be a trench 54 s where the insulating resin 50 isfilled, and has the merit of effecting insulation between the conductivepaths 51 as the device such as the first embodiment. An advantage ofpreventing the conductive paths 51 from slipping from the insulatingresin 50 in the arrangement of the embodiment is slightly smaller thanthat of the first embodiment.

Second Embodiment for Circuit Device

A circuit device 53 of FIG. 2 will be described below.

This circuit device has substantially the same structure as that of FIG.1, except that the interconnects L1 and L2 are formed as the conductivepaths 51. Accordingly, the interconnects L1 and L2 will be describedbelow.

As described before, there are a wide variety of IC circuits from asmall-scale circuit to a large-scale circuit. For the convenience of thedrawings, the small-scale circuit is only shown in FIG. 2A. This circuitis most applicable to an audio amplifying circuit having a differenceamplifying circuit and a current mirror circuit connected. Thedifference amplifying circuit is constituted of a TR1 and a TR2, and thecurrent mirror circuit is constituted of a TR3 and a TR4, as shown inFIG. 2A.

FIG. 2B is a plan view of the circuit device to which the circuit ofFIG. 2A is applied. FIG. 2C is a cross-sectional view taken along theline A-A in FIG. 2B. FIG. 2D is a cross-sectional view taken along theline B-B. To the left of FIG. 2B, a die pad 51A for mounting the TR1 andTR3 is provided. To the right of FIG. 2B, a die pad 51D for mounting theTR2 and TR4 is provided. On the upper side of the die pads 51A, 51D,there are provided the electrodes for external connection 51B, 51E to51G, and on the lower side thereof, there are provided the electrodesfor external connection 51C, 51H to 51J. Since a TR1 emitter and a TR2emitter are commonly connected, an interconnect L2 is formed integrallywith the electrodes 51E, 51G. Also, since a TR3 base and a TR4 base, aswell as a TR3 emitter and a TR4 emitter are commonly connected, aninterconnect L1 is formed integrally with the electrodes 51C, 55J, andan interconnect L3 is formed integrally with the electrodes 55H, 55I.

The present invention has a feature of the interconnects L1 to L3. Theycorrespond to the interconnects 25 and 29 in FIG. 28. Theseinterconnects are different depending on the degree of integration ofthis circuit device, and have the width as narrow as 25 μm or more. Notethat this width of 25 μm is a numerical value taken when the wet etchingis used. If the dry etching is used, its width can be narrower.

As will be clear from FIG. 2D, a conductive path L1 constituting theinterconnect L1 simply has the back face exposed, and has a lateral faceof curved structure which is supported by the insulating resin 50. Inother words, the interconnect is buried into the insulating resin 50.Hence, the wires can be prevented from slipping or warping, unlike thewires simply pasted on the support substrate as shown in FIG. 25.Particularly, since the lateral face of the first conductive path is arough face with curved structure, and the visor is formed on the surfaceof the conductive path, there occurs an anchor effect to prevent theconductive path from slipping off the insulating resin, as will beunderstood from a manufacturing method hereinafter described.

The electrodes 51B, 51C, 551E to 51J for external connection are buriedinto the insulating resin, as described previously. Therefore, even ifan external force is applied via an external lead secured therein, theelectrodes are unlikely to be peeled.

Third Embodiment for Circuit Device

A circuit device 56 of FIG. 8 will be described below.

This circuit device has substantially the same structure of FIG. 1 or 2,except that a conductive coat 57 is formed on the surface of theconductive paths 51. Herein, the conductive coat 57 on the conductivepaths will be mainly described below.

A first feature is to provide the conductive coat 57 to prevent thecircuit device or the conductive path 51 from warping.

Typically, due to a difference in thermal expansion coefficient betweenthe insulating resin and the conductive path material (hereinafterreferred to as a first material) the circuit device itself may bewarped, or the conductive path curved or peeled. Since the thermalconductivity of the conductive paths 51 is superior to that of theinsulating resin, the conductive paths 51 will rise in temperature morerapidly, and expand. A second material having a smaller thermalexpansion coefficient than the first material is coated. Thereby, it ispossible to prevent the curvature or exfoliation of the conductivepaths, and the warpage of the circuit device. Particularly, when thefirst material is Cu, the second material is preferably Au, Ni or Pt. Cuhas an expansion coefficient of Cu is 16.7×10−6. (10 to the minus 6thpower), Au 14×10−6, Ni 12.8×10−6, and Pt 8.9×10−6. In this case, aplurality of layers may be formed.

A second feature is to provide an anchor effect based on the secondmaterial. A visor 58, which is formed of the second material, is formedover the conductive path 51 to be buried into the insulating resin 50,bringing about the anchor effect to prevent the slippage of theconductive paths 51. The visor 58 can be formed by the conductive pathitself.

In the present invention, both the curved structure 59 and the visor 58develops the double anchor effect to suppress the slippage of theconductive paths 51.

In the above three embodiments, there has been described the circuitdevice having a transistor chip 52A and a passive element 52B mounted.However, the present invention is also applicable to a circuit devicewhich is constituted of one semiconductor device sealed therein, asshown in FIGS. 21 and 22. FIG. 21 shows a circuit device 81 in which aface down element 80 such as a CSP is mounted. FIG. 22 shows a circuitdevice 83 in which the passive element 82 such as a chip resistor orchip capacitor is sealed. Further, the bonding wire may be providedbetween two conductive paths and sealed therein. This is usable as afuse.

First Embodiment for a Manufacturing Method of a Circuit Device

Referring to FIGS. 3 to 7 and FIG. 1, a manufacturing method of acircuit device 53 will be described below.

Firstly, a sheet conductive foil 60 is prepared. This conductive foil 60is composed of a material which is selected in consideration of theadhesive property to the brazing material, bonding property and platingproperty. Specifically, the material may be Cu or Al as the mainconstituent, or an alloy of Fe—Ni. Further lamination plate of Cu and Alis applicable. The conductive foil is preferably about 10 μm to 300 μmthick in view of the etching that is performed later. Herein, a copperfoil having a thickness of 70 μm (2 ounces) is used. However, thethickness may be fundamentally over 390 μm or less than 10 μm. It issufficient that the trench 61 which has a smaller depth than thethickness of the conductive foil 60 may be formed, as will be describedlater.

The sheet laminated conductive foil 60 is rolled in a desired width, andmay be carried to each process as will be described later, or may be cutin a predetermined size, the cut conductive foils being carried to eachprocess.

Subsequently, there are a step of removing the conductive foil 60,except for at least a region which becomes the conductive paths 51,below a thickness of the conductive foil 60, a step of mounting thecircuit elements 52 on the conductive paths 60, and a step of coatingthe insulating resin 50 in the trench 61 formed at the, step of removingand the conductive foil 60 to seal the circuit elements.

Firstly, a photo-resist (PR) (etching resistant mask) is applied on theconductive foil 60 of Cu, and patterned to expose the conductive foil 60excluding the region which becomes the conductive paths 51, as shown inFIG. 4. And etching is performed via the photo-resist PR, as shown inFIG. 5A.

This manufacturing method has a feature that the wet etching or dryetching can be performed non-anisotropically by selecting the etchingcondition. Then the lateral face (side surface) is a rough face andcurved. Note that the depth of the trench 61 formed by etching is about50-70 μm.

In the wet etching, etchant may be ferric chloride or cupric chloride.The conductive foil may be dipped in this etchant, or this etchant maybe showered.

Particularly as shown in FIG. 5B, etching in the transversal directionis difficult to proceed directly under the photo-resist PR as theetching mask, but is gradually made in a deeper portion of the trench 61in the transversal direction. As shown in the figure, with reference toa certain position on the lateral face of the trench 61, the size ofaperture corresponding to its position is smaller with increased height,to taper inversely, resulting in the anchor structure. By showering, theetching proceeds in the depth direction, but is suppressed in thetransversal direction, so that this anchor structure becomes remarkable.

In the dry etching, the orientation-dependent(anisotoropic) etching ornon-anisotropic etching can be made. At present, it is said that Cu cannot be removed by reactive ion etching. Cu can be removed by sputtering.The orientation-dependent etching or non-anisotropic etching can beeffected, depending on the sputtering or etching conditions.

In FIG. 5, a conductive material which is resistant to the etchingliquid may be selectively coated, instead of the photo-resist. Bycoating selectively this conductive material on a portion serving as theconductive path, this conductive material becomes an etching protectivefilm, so that the trench can be etched without the use of the photoresist PR. The conductive materials may include Ag, Au, Pt, Pd or N.These corrosion resistant conductive materials have a feature of beingreadily available as the die pad or bonding pad.

For example, Ag can be bonded with Au and the brazing material. Hence,if Au has been coated on the back face of chip, the thermocompressionbonding of chip can be effected with the Ag on the conductive coat 51,or the chip can be fixed via the brazing material such as solder. Sincethe Au bonding wire can be bonded to the conductive coat of Ag, the wirebonding is allowed. Accordingly, there is provided a merit that theseconductive coats can be directly utilized as the die pad and the bondingpad.

Subsequently, there is a step of connecting electrically the circuitelements 52 to the conductive foil 60 formed with the trench 61, asshown in FIG. 6.

The circuit elements 52 include the semiconductor device 52A such as atransistor, a diode and an. IC chip, and the passive element 52B such asa chip capacitor and a chip resistor. Though being thick, a face downsemiconductor device such as CSP or BGA can be mounted.

Herein, the bare transistor chip 52A is die bonded to the conductivepath 51A. Also, the emitter electrode and the conductive path 51B, aswell the base electrode and the conductive path 51B, are connected viathe bonding wire 55A which has been fixed by ball bonding withthermocompression, or wedge bonding with ultrasonic wave. The chipcapacitor or the passive element 52B is fixed via the brazing materialsuch as solder or the conductive paste 55B.

When the pattern of FIG. 28 is applied in this embodiment, the bondingpad 26, which is very small in size, is provided integrally with theconductive foil 60, as shown in FIG. 5. Hence, there is a merit that theenergy of bonding tool can be transferred, with greater bonding ability.In cutting the bonding wire after bonding, the bonding wire may bepull-cut. Then, since the bonding pad is integrated with the conductivefoil 60, floating of the bonding pad can be suppressed, leading tobetter pull-cut ability.

Further, there is a step of attaching the insulating resin 50 onto theconductive foil 60 and the curved trench 61, as shown in FIG. 7. Thiscan be performed by transfer molding, injection molding, dipping orapplication. The resin materials include a thermosetting resin such asepoxy resin for which the transfer molding is suitable, and athermoplastic resin such as polyimide resin and polyphenylene sulfidefor which the injection molding is usable.

In this embodiment, the insulating resin applied on the surface of theconductive foil 60 is adjusted so as to cover the thickness of about 100μm from the top of the bonding wire 55A. This thickness may be increasedor decreased in consideration of the strength of the circuit device.

A feature of this step is that the conductive foil 60, which becomes theconductive paths, serves as the support substrate up to being coatedwith the insulating resin 50. Conventionally, the support substrate 5which is intrinsically not required is adopted to form the conductivepaths 7 to 11, as shown in FIG. 26. In the present invention, theconductive foil 60 which becomes the support substrate is a necessarysubstance for the electrodes. Therefore, there is a merit that theoperation can be effected by saving the material, with less cost.

The trench 61 has a smaller depth than the thickness of the conductivefoil. Therefore, the conductive foil is not separated individually intothe conductive paths. Accordingly, it can be treated integrally as onesheet conductive foil 60. It has a feature of the easy operation ofcarrying or mounting it onto the mold, when molding the insulatingresin.

Further, since the insulating resin 50 is fitted into the trench 61having the curved structure, there occurs the anchor effect in thisregion to prevent the insulating resin 50 from being peeled, and theconductive paths 51 from slipping. off the insulating resin 50, theconductive paths 51 being separated at the later step.

Before coating this insulating resin 50, the silicone resin may bepotted to protect the semiconductor chip or the connecting part ofbonding wire, for example.

Subsequently, there is a step of removing chemically and/or physicallythe back face of the conductive foil 60 for separation into theconductive paths 51. This step of removing can be effected by polishing,grinding, etching, or metal evaporation using a laser irradiation.

In the experiments, the circuit device was cut about 30 μm thick overthe entire surface by a polishing or grinding apparatus to expose theinsulating resin 50 from the trench 61. This exposed face is indicatedby the dot line in FIG. 7. As a result, each of the conductive paths 51is about 40 μm thick. Before the insulating resin 50 is exposed, theconductive foil maybe subjected towed etching over the entire surfacethereof. Then, the conductive foil may be cut over the entire surface bythe polishing or grinding apparatus to expose the insulating resin 50.Further conductive path 51 can be separated by only wet etching step.

As a result, the conductive paths 51 are exposed from the insulatingresin 50. And the trench 61 is cut, resulting in the trench 54 as shownin FIG. 1 (see FIG. 7).

Lastly, a conductive material such as solder 5D may be applied onto thesecond conductive paths 51 exposed, as required, to complete the circuitdevice as shown in FIG. 1.

In the case where the conductive material is coated on the back face ofthe conductive paths 51, the conductive coat may be formed ahead on theback face of the conductive foil of FIG. 3. In this case, the conductivecoat may be selectively applied on the portion corresponding to theconductive path. The way of coating may be by plating. This conductivecoat may be a material resistant to etching. When this conductive coatis adopted, the conductive paths 51 can be formed only by etching,without polishing.

With this manufacturing method, the transistor and the chip resistor areonly mounted on the conductive foil 60, but may be arranged in a matrixof transistors and chip resistors, or a matrix of circuits as shown inFIG. 28. In this case, the matrix can be divided into individual unitsby using a dicing apparatus, as will be described later.

With this manufacturing method, the circuit device 56 of flat type canbe fabricated in which the conductive paths 51 are buried into theinsulating resin 50, and there is a common back face for the conductivepaths 51 and the insulating resin 50.

A feature of this manufacturing method is that the insulating resin 50is utilized as the support substrate and can be separated into theindividual conductive paths.

The insulating resin 50 is required to have the conductive paths 51buried therein. There is no need of having unnecessary support substrate5, unlike the, conventional manufacturing method of FIG. 26.Accordingly, it can be manufactured with the minimum amount of material;with less cost.

The thickness of the insulating resin from the surface of the conductivepaths 51 can be adjusted when the insulating resin is attached at theprevious step. Accordingly, the thickness of the circuit device 56 canbe increased or decreased, depending on the circuit element to bemounted. Herein, in the circuit device, the conductive paths 51 having athickness of 40 μm is buried into the insulating resin 50 having athickness of 400 μm (see FIG. 1).

Second Embodiment for a Manufacturing Method of a Circuit Device

Referring to FIGS. 9 to 13 and FIG. 8B, a manufacturing method of acircuit device 56 having advisor 58 will be described below. The secondembodiment is substantially the same as the first embodiment (FIGS. 1and 2), except that a second material 70 which serves as the visor isapplied. The details are not described here.

Firstly, a laminated conductive foil 60, is prepared in which the secondmaterial 70 having a small etching rate is applied on the conductivefoil 60 made of the first material, as shown in FIG. 9.

For example, if Ni is applied on the Cu foil, Cu and Ni can be etched byferric chloride or cupric chloride at a time, advantageously resultingin the formation of the visor 58 of Ni, due to a difference betweenetching rates. The bold line indicates the conductive coat 70 made ofNi, its film thickness being preferably about 1 to 10 μm. The largerfilm thickness of Ni can form the visor 58 more easily.

The second material may cover the first material as well as the materialfor selective etching. In this case, the film made of the secondmaterial is firstly patterned to cover the formed area of the conductivepaths 51. Then, with this film as a mask, the first material is etchedso that the visor 58 can be formed. The second materials may include Al,Ag, Pd and Au (see FIG. 9).

Subsequently, there is a step of removing the conductive foil 60 exceptfor at least the region which becomes the conductive paths 51 below thethickness of the conductive foil 60.

The photo-resist PR is formed on the Ni conductive coat 70, andpatterned so that the Ni conductive coat 70 may be exposed except forthe region which becomes the conductive paths 51, as shown in FIG. 10.Then, etching is performed with the photo-resist, as shown in FIG. 11.

As described previously, if etching is performed, using an etchant suchas ferric chloride or cupric chloride, the visor 58 juts out as theetching proceeds, because the Ni conductive coat 70 has a slower etchingrate than the conductive foil Cu 60.

The steps of mounting the circuit elements 52 on the conductive foil 60with the trench 61 formed (FIG. 12), covering the insulating resin 50over the conductive foil 60 and the trench 61, removing the back face ofthe conductive foil 60 chemically and/or physically for separation intothe conductive paths 51 (FIG. 13), and forming the conductive coat onthe back face of the conductive paths to complete the circuit device(FIG. 8) are the same as those of the previous manufacturing method, andnot described again.

Third Embodiment for a Manufacturing Method of a Circuit Device

Referring to FIGS. 14 to 20, a method for manufacturing a circuit devicewill be described below, in which the IC circuits having the conductivepaths composed of a plurality of kinds of circuit elements, wires, diepads and bonding pads are arranged like a matrix and divided intoindividual IC circuits after sealing. Referring to FIG. 2 andparticularly a cross-sectional view of FIG. 2C, the structure will bedescribed below. This manufacturing method is substantially the same asin the first embodiment and the second embodiment, and is simplydescribed.

Firstly, a sheet conductive foil 60 is prepared, as shown in FIG. 14.

The sheet conductive foil 60 is rolled in a predetermined width, and maybe carried to the later process. Or the conductive foils cut in apredetermined size may be prepared and carried to the later process.

Subsequently, there is a step of removing the conductive foil 60 exceptfor at least the region which becomes the conductive paths 51 below thethickness of the conductive foil 60.

Firstly, the photo-resist PR is made on the Cu foil 60, and patterned sothat the conductive foil 60 may be exposed except for the region whichbecomes the conductive paths 51, as shown in FIG. 15. And etching isperformed via the photo-resist PR, as shown in FIG. 16.

The trench 61 formed by etching is 50 μm in depth, for example, with itslateral face being rough, leading to increased adhesiveness of theinsulating resin 50.

The lateral face of the trench 61 is etched non-anisotropically, andcurved. This step of removing can be wet etching, or dry etching. Thiscurved structure produces the anchor effect. (For more details refer tothe first embodiment for the manufacturing method of the circuitdevice.)

In FIG. 15, a conductive material which is resistant to the etchingsolution may be selectively coated, instead of the photo-resist PR. Ifit is selectively coated on the portion for the conductive paths, thisconductive material serves as an etching protective film. As a result,the trench can be etched without the use of resist.

Subsequently, there is a step of electrically connecting and mountingthe circuit elements 52A to the conductive foil 60 formed with thetrench 61, as shown in FIG. 17.

The circuit elements 52A include semiconductor devices such as atransistor, a diode, and an IC chip, and passive elements such as a chipcapacitor and a chip resistor. Also, though being thicker, the face downsemiconductor devices such as CSP and BGA may be mounted.

Herein, the bare transistor chip 52A is die bonded to the conductivepath 51A. Consequently, the emitter electrode and the conductive path51B, as well as the base electrode and the conductive path 51B areconnected via the bonding wire 55A.

Furthermore, there is a step of applying the insulating resin 50 to theconductive foil 60 and the trench 61, as shown in FIG. 18. This step canbe performed by transfer molding, injection mold, or dipping.

In this embodiment, the insulating resin applied on the surface of theconductive foil 60 is adjusted to be about 100 μm thick from the top ofthe circuit elements mounted. This thickness can be made thicker orthinner in view of the strength of the circuit device.

A feature of this step is that the conductive foil 60, which becomes theconductive paths 51, serves as the support substrate, when coated withthe insulating resin 50. Conventionally, the support substrate 5 whichis intrinsically not required is used to form the conductive paths 7 to11, as shown in FIG. 26. In the present invention, the conductive foil60 which becomes the support substrate is a necessary substance for theelectrodes. As a result, the manufacturing operation can be performed bysaving the material, with less cost.

The trench 61 has a smaller depth than the thickness of the conductivefoil. Therefore, the conductive foil is not separated individually intothe conductive paths 51. Accordingly, it can be treated integrally asone sheet conductive foil 60. It has a feature of the easy operation ofcarrying or mounting it onto the mold, when molding the insulatingresin.

Subsequently, there is a step of removing chemically and/or physicallythe back face of the conductive foil 60 for separation into theconductive paths 51. This step of removing can be effected by polishing,grinding, etching, or metal, evaporation with laser.

In, the experiments, the circuit device was cut about 30 μm thick overthe entire surface by a polishing or grinding apparatus to expose theinsulating resin 50. This exposed face is indicated by the dot line inFIG. 18. As a result, each of the conductive paths 51 is about 40 μmthick. Before the insulating resin 50 is exposed, the conductive foil 60may be subjected to wet etching over the entire surface thereof. Then,the conductive foil may be cut over the entire surface by the polishingor grinding apparatus to expose the insulating resin 50.

As a result, the surface of the conductive paths 51 is exposed from theinsulating resin 50.

Further, a conductive material such as solder is applied on the exposedconductive paths 51, as shown in FIG. 19.

Lastly, there is a step of completing the circuit device by separationinto individual circuit elements, as shown in FIG. 20.

The separation line is indicated by the arrow, and separation can beeffected by dicing, cut, press, or chocolate break. When using thechocolate break, a projection on the mold may be provided to form thegroove at the separation line in coating the insulating resin.

Particularly, the dicing is mostly used in the manufacturing method ofthe semiconductor devices, and is preferable because it can cut verysmall things.

The manufacturing method as described in the first to third embodimentsallows for the complex patterns, as shown in FIG. 28. Particularly, thewire is bent and integral with the bonding pad 26, the other end beingelectrically connected with the circuit element. The wire is narrow inwidth, and long. Therefore, the warp(curvature) caused by heat is verysignificant, resulting in exfoliation in the conventional structure.However, in the present invention, since the wires are buried into theinsulating resin and supported, it is possible to prevent curvature,exfoliation and slippage of the wires. The bonding pad itself has asmall plane area, and may be peeled in the conventional structure.However, since in the present invention, the bonding pad is buried intothe insulating resin and supported by the insulating resin, with theanchor effect, there is a merit of preventing the slippage.

Further, there is another merit that the circuit device having thecircuit elements buried into the insulating resin 50 can be produced.This is similar to the conventional structure in which the circuit isincorporated into a printed circuit board or a ceramic substrate. Thiswill be described later in connection with a way of mounting.

To the right of FIG. 27, a simple flow diagram of the present inventionis presented. The circuit device can be fabricated in accordance withthe nine steps of preparing a Cu foil, plating with Ag or Ni, halfetching, die bonding, wire bonding, transfer molding, removing the backface of Cu foil, treating the back face of conductive path, and dicing(dividing to a plurality of devices). And all the steps can be performedin the inside work without supplying the support substrate from themanufacturer.

Mode for providing various kinds of circuit devices and the ways ofmounting

FIG. 21 shows a circuit device 81 having a face down circuit element 80mounted. The circuit element 80 is a bare semiconductor chip which havesolder ball in the face, CSP or BGA having sealed surface. FIG. 22 showsa circuit device 83 having a passive element 82 such as a chip resistormounted. They are of thin type because of no need of the supportsubstrate. Also, they are sealed by the insulating resin, and superiorin the environmental resistance.

FIG. 23 shows the mounting structure. Firstly, FIG. 23A shows thecircuit devices 53, 81, and 83 as described above, which are mounted inthe conductive paths 85 formed on a mounting substrate 84 such as aprinted circuit board, metal, substrate, or ceramic substrate.

Particularly, a conductive path 51A to which the back face of asemiconductor chip 52 is fixed is thermally coupled to the conductivepaths 85 on the mounting substrate 84. Therefore, the heat of thecircuit device can be radiated via the conductive paths 85. If the metalsubstrate is used for the mounting substrate 84, the temperature of thesemiconductor chip 52 can be further decreased, due to radiation of themetal substrate. Therefore, the driving capability of the semiconductorchip can be enhanced.

For example, the power MOS, IGBT, SIT, large current drivingtransistors, and large current driving IC (MOS, BIP, Bi-CMOS), memory ICare preferable.

The metal substrates preferably include an Al substrate, a Cu substrateand a Fe substrate. In view of the short-circuit with the conductivepaths 85, the insulating resin and/or oxide films are formed.

FIG. 23B shows a circuit device 90 of the invention which is utilized asthe substrate 84 of FIG. 23A. This is the greatest feature of thepresent invention. Namely, the conventional printed circuit board orceramic substrate has a through hole TH formed in the substrate. In thepresent invention, a substrate module containing an IC circuit can befabricated. For example, at least one circuit (which may be contained asthe system) is contained in the printed circuit board.

Conventionally, the support substrate used the printed circuit board orceramic substrate. In the present invention, the substrate module doesnot need the support substrate. This substrate module can be thinner andlighter than a hybrid substrate which may be the printed circuit board,the ceramic substrate, or the metal substrate.

This circuit device 90 is, utilized as the support substrate, and thecircuit elements can be mounted in the exposed conductive paths,resulting in a high performance substrate module. Particularly, if thiscircuit device is a support substrate and a circuit device 91 is mountedon the support substrate, the substrate module can be made furtherthinner and lighter.

Accordingly, according to the above embodiments, an electronic apparatuswith this module mounted can be reduced in size and weight.

The hatching part indicated by numeral 93 is an insulating film. Forexample, a high molecular film such as solder resist is preferable. Dueto formation of this film, it is possible to prevent the conductivepaths buried into the substrate 90 and the electrodes formed on thecircuit elements 91 from short-circuiting.

Referring to FIG. 29, there will be described some merits of the presentcircuit device in the following. In the conventional mounting method,the semiconductor manufacturers fabricated the package typesemiconductor devices and flip chips. The set makers mounted thesemiconductor devices supplied from the semiconductor manufacturers andthe passive elements supplied from the parts makers on the printedcircuit board and incorporated the circuit devices into the set tofabricate an electronic apparatus. However, since the circuit device ofthis invention allows itself to be used as the mounting substrate, thesemiconductor manufacturers can complete the mounting substrate modulein the later process, and deliver it to the set makers. Accordingly, theset makers can greatly save the operation of mounting the elements onthe substrate.

As will be clearly understood, the present invention can fabricate thecircuit devices with the conductive paths and the minimum amount ofinsulating resin, resulting in less wasteful resources. Hence, thecircuit devices can be fabricated with less superfluous components up tocompletion, and with greatly reduced cost. The film thickness ofinsulating resin, and the thickness of conductive foil, can beoptimized, to make the circuit device smaller, thinner and lighter.Furthermore, since the wires liable to curvature or exfoliation areburied into the insulating resin, those problems can be resolved.

Since the back face of conductive paths is exposed from the insulatingresin, the back face of conductive paths can be directly contacted withthe external. Hence, there is an advantage that the back face electrodeand through hole of the conventional structure can be dispensed with.

When the circuit elements are directly fixed via the conductive coatmade of the brazing material, Au or Ag, the heat developed by thecircuit elements can be transferred directly via the conductive paths tothe mounting substrate, because the back face of conductive paths isexposed. Particularly, the power elements can be also mounted, due tothis heat radiation.

This circuit device has a flat plane structure in which the surface forthe trench is substantially coincident with the surface for theconductive paths. If a narrow pitch QFP is mounted on the supportsubstrate, the circuit device itself can be moved horizontally, as shownin FIG. 23B. Consequently, the lead shift can be easily modified.

Since the second material is formed on the surface of the conductivepaths, the warping of the mounting substrate, or particularly thecurvature or exfoliation of the fine slender wire can be prevented.

Since the conductive paths has the curved structure on the lateral face,and/or the second material is formed on the surface of conductive paths,a visor applied to a conductive path can be formed, bringing about theanchor effect to prevent the conductive paths from warping and slipping.

In the manufacturing method of the circuit device according to thepresent invention, the conductive foil itself serving as the conductivepaths is utilized as the support substrate. The whole substrate issupported by the conductive foil, up to the steps of forming the trenchor mounting the circuit elements and applying the insulating resin,while to divide the conductive foil into the conductive paths, theinsulating resin is used as the support substrate. Accordingly, thecircuit device of the invention can be manufactured with the leastamount of circuit elements, conductive foil, and insulating resin, asrequired. As described in the conventional example, this circuit devicecan be fabricated without need of having the support substrate and withthe reduced cost. Since the support substrate is unnecessary, theconductive paths are buried into the insulating resin, with theadjustable thickness of the insulating resin and the conductive foil,there is a merit that the circuit device can be made very thin. Informing the trench, the curved structure results, bringing about theanchor effect.

As will be apparent from FIG. 27, the steps of forming the through holeand printing the conductors (for the ceramic substrate) can be omitted.Therefore, the manufacturing process can be significantly shortened, andadvantageously the whole process can be performed in the inside work.Also, the frame mold is unnecessary at all, leading to quite shortdelivery.

Since the conductive paths can be treated integrally, up to the step ofremoving the conductive foil (e.g., half etching), there is an advantageof the enhanced workability in the later step of coating the insulatingresin.

Since there is a common face for the conductive paths and the insulatingresin, the circuit device mounted can be moved without impact upon thelateral face of the conductive paths on the mounting substrate.Particularly, the circuit device mismounted can be redisposed byshifting it horizontally. If the brazing material is molten aftermouting the circuit device, the circuit device mismounted will tend toget back onto the conductive path, owing to surface tension of themolten brazing material. Consequently, the reallocation of circuitdevice can be effected by itself.

Lastly, this circuit device can be utilized as the support substrate tomount the circuit elements in the exposed conductive paths, resulting ina substrate module with high performance. Particularly, if this circuitdevice is used as the support substrate and the circuit device 91 as thecircuit element is mounted thereon, the substrate module can be madelighter and thinner.

1-46. (Canceled)
 47. A method of manufacturing a circuit device using aconductive plate having a trench that separates conductive path regionsof the conductive plate, wherein the trench has a depth less than thethickness of the conductive plate, the method comprising: planarlymounting a plurality of circuit elements on a conductive path to make aelectrical circuit.
 48. The method of claim 47 wherein includingmounting a circuit element over said trench.
 49. The method of claim 47wherein the conductive plate is a partially etched or pressed metalplate.
 50. The method of claim 49 wherein the circuit element comprisesa semiconductor chip.
 51. The method of claim 49 wherein the trench hasa thickness in a range of 20-100 μm.
 52. The method of claim 49including filling the trench with an insulating resin.
 53. The method ofclaim 52 including removing part of the conductive plate from a side ofthe conductive plate opposite the resin-filled trench to a depth thatreaches the resin-filled trench so that the conductive paths areelectrically isolated from one another.
 54. The method of claim 53including removing part of the conductive plate so that a back side ofthe conductive paths protrudes beyond a back side of the resin-filledtrench.
 55. The method of claim 53 including removing a part of theconductive plate so that a back side of the resin-filled trenchprotrudes beyond a back side of the conductive paths.
 56. A method ofmanufacturing a circuit device using a conductive plate having aresin-filled trench that separates conductive path regions of theconductive plate, wherein the resin-filled trench has a depth less thanthe thickness of the conductive plate, and wherein the conductive pathregions provide electrical connections among a plurality of circuitelements, the method comprising: removing part of the conductive platefrom a side of the conductive plate opposite the resin-filled trench toa depth that reaches the resin-filled trench so that the conductivepaths are isolated from one another.
 57. The method of claim 56including removing part of the conductive plate so that a back side ofthe conductive paths protrudes beyond a back side of the resin-filledtrench.
 58. The method of claim 56 including removing part of theconductive plate so that a back side of the resin-filled trenchprotrudes beyond a back side of the conductive paths
 59. The method ofclaim 56 wherein the conductive plate is a partially etched or pressedmetal plate.
 60. The method of claim 59 wherein the circuit elementcomprises a semiconductor chip.
 61. The method of claim 60 wherein thetrench has a thickness in a range of 20-100 μm.
 62. A method ofmanufacturing a circuit device using a conductive plate having one ormore trenches that separate die pad regions, bonding pad regions andinterconnection regions of the conductive plate, wherein the one or moretrenches have a depth less than the thickness of the conductive plate,the method comprising: providing an electrical connection between acircuit element and one of the bonding pad regions; and providing aninsulating resin to cover the die pad regions, the bonding pad regions,the interconnection regions, the electrical connection and the circuitelement, and to fill the one or more trenches.
 63. The method of claim62 including: etching a back side of the interconnection regions toexpose the resin-filled one or more trenches.
 64. The method of claim 62wherein at least one of the interconnection regions interconnects one ofthe die pad regions to at least one of the bonding pad regions.
 65. Amethod of manufacturing a circuit device, the method comprising:providing a conductive plate; and partially etching or pressing a frontside of the conductive plate to form die pad regions, bonding padregions, and interconnection regions in the conductive plate, whereineach interconnection region electrically couples a respective first diepad or bonding pad region to a respective second die pad or bonding padregion.
 66. The method of claim 65 wherein at least one of theinterconnection regions interconnects one of the die pad regions to atleast one of the bonding pad regions.
 67. The method of claim 65including: mounting a circuit element on a surface of at least one ofthe die pad regions; providing an electrical connection between thecircuit element and at least one of the bonding pad regions; andproviding an insulating resin over the front side of the conductiveplate, wherein the insulating resin fills areas between the die padregions, the bonding pad regions and the interconnection regions. 68.The method of claim 67 including: removing part of the conductive platefrom a side of the conductive plate opposite the side of the conductiveplate on which the insulating resin is provided to a depth that reachesthe resin-filled areas.
 69. The method of claim 68 including removingpart of the conductive plate so that a back side of the die pad regions,the bonding pad regions and the interconnection regions protrudes beyonda back side of the resin-filled areas.
 70. A circuit device comprising:a die pad region, bonding pad regions, and an interconnection region,wherein the interconnection region electrically couples a first bondingpad region to a second bonding pad region or the die pad region; acircuit element mounted on a surface of the die pad region; and aninsulating resin (50) over circuit element, wherein the insulating resinfills areas between the die pad region, the bonding pad regions and theinterconnection region.
 71. A circuit device comprising first and asecond die pads region; and an interconnection region, wherein theinterconnection region extends in parallel with and in a vicinity of aside of the first die pad region up to and in parallel with a vicinityof a side of the second die pad region, and wherein the interconnectionregion functions as an interconnection between a bonding pad of a firstcircuit element mounted on the first die pad region, a bonding pad of asecond circuit element mounted on the second die pad region, and thefirst and second bonding pads, and including an insulating resin overthe die pad regions, the bonding pad regions and the interconnectionregion, wherein the insulating resin fills areas between the die padregions, the bonding pad regions and the interconnection region.
 72. Thecircuit device of claim 71 comprising a semiconductor element mounted ona surface of at least one of the die pad regions, and including aninterconnection region that extends from at least one the die padregions.
 73. The circuit device of claim 71 comprising a firsttransistor chip mounted on a surface of a first one of the die padregions and a second transistor chip mounted on a surface of a secondone of the die pad regions, wherein the first transistor chip iselectrically coupled to a first one of the bonding pad regions thatserves as a first emitter electrode, and the second transistor chip iselectrically coupled to a second one of the bonding pad regions thatserves as a second emitter electrode, wherein an interconnection regioninterconnects the first and second bonding pad regions.
 74. The circuitdevice of claim 71 comprising a first transistor chip mounted on asurface of a first one of the die pad regions and a second transistorchip mounted on a surface of a second one of the die pad regions,wherein the first transistor chip is electrically coupled to a first oneof the bonding pad regions that serves as a first base electrode, andthe second transistor chip is electrically coupled to a second one ofthe bonding pad regions that serves as a second base electrode, whereinan interconnection region electrically couples the first and secondbonding pad regions.
 75. The circuit device of claim 71 comprising atransistor chip mounted on a surface of a first one of the die padregions and an IC chip mounted on a surface of a second one of the diepad regions, wherein an interconnection region forms at least part of anelectrical path coupling the transistor chip and the IC chip.
 76. Thecircuit device of claim 75 comprising a passive circuit element on asurface of a third die pad region.